255 lines
9.4 KiB
C
255 lines
9.4 KiB
C
/*
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* RGB parallel panel driver for the Elecrow CrowPanel 7" ADVANCE (800x480).
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*
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* NOTE: the Advance and the Basic CrowPanel 7" share almost no pins. Every
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* data line, every sync line, the pixel clock, the porches and the sync
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* polarities differ, and the Advance drives its backlight over I2C rather
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* than from a GPIO. Configuration below is the Advance; do not mix the two.
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*
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* Reference: Elecrow Advance-series wiki and the LovyanGFX board config in
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* the FluidTouch project (elecrow-crowpanel-7-advance-v13).
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*/
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#include <stdlib.h>
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#include <string.h>
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#include "driver/gpio.h"
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#include "esp_heap_caps.h"
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#include "esp_check.h"
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#include "esp_lcd_panel_ops.h"
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#include "esp_lcd_panel_rgb.h"
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#include "esp_log.h"
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#include "lvgl.h"
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#include "display_rgb.h"
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static const char *TAG = "display_rgb";
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/* --- Sync / control pins (Advance) --- */
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#define RGB_DE_GPIO 42
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#define RGB_VSYNC_GPIO 41
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#define RGB_HSYNC_GPIO 40
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#define RGB_PCLK_GPIO 39
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/*
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* --- Data pins (Advance), 16-bit RGB565 ---
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* data_gpio_nums[0..4] = B0-B4, [5..10] = G0-G5, [11..15] = R0-R4.
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*/
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#define RGB_B0_GPIO 21
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#define RGB_B1_GPIO 47
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#define RGB_B2_GPIO 48
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#define RGB_B3_GPIO 45
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#define RGB_B4_GPIO 38
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#define RGB_G0_GPIO 9
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#define RGB_G1_GPIO 10
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#define RGB_G2_GPIO 11
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#define RGB_G3_GPIO 12
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#define RGB_G4_GPIO 13
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#define RGB_G5_GPIO 14
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#define RGB_R0_GPIO 7
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#define RGB_R1_GPIO 17
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#define RGB_R2_GPIO 18
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#define RGB_R3_GPIO 3
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#define RGB_R4_GPIO 46
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/*
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* --- Panel timings (Advance) ---
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*
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* 18MHz is not tunable in practice. With htotal 820 and vtotal 500 it gives
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* ~44 Hz, which this panel locks to; dropping to 14MHz yields ~34 Hz and the
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* image rolls vertically because the panel cannot lock that slow. Bandwidth
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* is dealt with by the bounce buffer instead.
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*/
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#define RGB_PCLK_HZ (18 * 1000 * 1000)
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#define RGB_HSYNC_PULSE_WIDTH 4
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#define RGB_HSYNC_BACK_PORCH 8
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#define RGB_HSYNC_FRONT_PORCH 8
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#define RGB_VSYNC_PULSE_WIDTH 4
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#define RGB_VSYNC_BACK_PORCH 8
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#define RGB_VSYNC_FRONT_PORCH 8
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/*
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* Scanlines staged in internal RAM per bounce-buffer chunk (two are
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* allocated, so this costs 2 * 800 * LINES * 2 bytes of internal RAM).
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*
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* Bigger is better here: each chunk buys the refill ISR that much more time
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* to copy the next one out of PSRAM before the LCD needs it. When it runs
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* late -- which WiFi interrupt activity is enough to cause -- the panel
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* displays whatever was left in the buffer, showing up as short stale lines
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* at the left edge where each chunk begins.
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*/
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/* 16 is the practical ceiling: two buffers at 20 lines need 64KB of internal
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* RAM and the allocation fails once WiFi is up. */
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#define BOUNCE_BUFFER_LINES 16
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static esp_lcd_panel_handle_t panel = NULL;
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static lv_display_t *disp = NULL;
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/*
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* Double-buffered flush.
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*
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* LVGL renders into whichever framebuffer the LCD is NOT currently scanning,
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* and the final flush of a refresh hands that buffer to the panel, which
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* switches to it. Nothing ever writes into the buffer being displayed.
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*
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* This matters more than it sounds: copying a partial rectangle into the live
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* framebuffer races the LCD's own reads, and the corruption scales with how
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* much is written -- forcing full-width flushes made it visibly worse. Those
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* corrupt pixels then persist indefinitely, because LVGL has no idea they are
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* wrong and never reinvalidates them.
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*/
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static void rgb_flush_cb(lv_display_t *display, const lv_area_t *area, uint8_t *px_map)
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{
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if (lv_display_flush_is_last(display)) {
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esp_lcd_panel_draw_bitmap(panel, 0, 0, DISPLAY_H_RES, DISPLAY_V_RES, px_map);
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}
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lv_display_flush_ready(display);
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}
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/*
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* Phase 1: allocate everything, scan nothing.
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*
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* Called BEFORE wifi_init_sta(), on a heap nothing else has touched. The
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* bounce buffers need two contiguous 25.6KB DMA-capable internal blocks, and
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* WiFi's dynamic RX buffers churn that same pool hard enough to fragment it:
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* observed on hardware (2026-08-04) as "no mem for bounce buffer" with 84KB
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* of total free heap -- plenty of bytes, no block big enough, and retries
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* useless because the fragmentation is not transient.
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*
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* Allocating first is deterministic where retrying was a dice roll. The
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* panel is NOT scanning after this returns -- scan-out (and with it the
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* PSRAM-reading refill ISR that flash writes would fault) starts only in
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* display_start().
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*/
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esp_err_t display_alloc(void)
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{
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ESP_LOGI(TAG, "Allocating 800x480 RGB panel (CrowPanel Advance)");
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const esp_lcd_rgb_panel_config_t panel_config = {
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.clk_src = LCD_CLK_SRC_DEFAULT,
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.timings = {
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.pclk_hz = RGB_PCLK_HZ,
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.h_res = DISPLAY_H_RES,
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.v_res = DISPLAY_V_RES,
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.hsync_pulse_width = RGB_HSYNC_PULSE_WIDTH,
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.hsync_back_porch = RGB_HSYNC_BACK_PORCH,
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.hsync_front_porch = RGB_HSYNC_FRONT_PORCH,
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.vsync_pulse_width = RGB_VSYNC_PULSE_WIDTH,
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.vsync_back_porch = RGB_VSYNC_BACK_PORCH,
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.vsync_front_porch = RGB_VSYNC_FRONT_PORCH,
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.flags = {
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/*
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* The Advance runs both syncs idle-HIGH (LovyanGFX
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* hsync_polarity/vsync_polarity = 1), which is esp_lcd's
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* default, so the *_idle_low flags stay clear. Its
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* pclk_idle_high = 1 maps onto LCD_CK_OUT_EDGE, which esp_lcd
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* exposes as pclk_active_neg.
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*/
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.pclk_active_neg = true,
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},
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},
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.data_width = 16,
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.bits_per_pixel = 16,
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/* Two framebuffers so LVGL never draws into the one being scanned. */
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.num_fbs = 2,
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/*
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* Bounce buffer in internal RAM. Fetching the framebuffer straight
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* from PSRAM at 18MHz underruns the LCD FIFO and the image walks
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* sideways; this stages each chunk in internal RAM first.
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*
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* Its refill ISR reads PSRAM, and PSRAM shares the cache with flash
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* on the S3, so a flash write while the panel is running faults it
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* with "Cache disabled but cached memory region accessed". app_main
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* therefore finishes all NVS/WiFi flash activity *before* calling
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* display_init(), and CONFIG_ESP_WIFI_NVS_ENABLED is off so the WiFi
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* stack does not write to flash later.
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*/
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.bounce_buffer_size_px = DISPLAY_H_RES * BOUNCE_BUFFER_LINES,
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.dma_burst_size = 64,
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.hsync_gpio_num = RGB_HSYNC_GPIO,
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.vsync_gpio_num = RGB_VSYNC_GPIO,
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.de_gpio_num = RGB_DE_GPIO,
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.pclk_gpio_num = RGB_PCLK_GPIO,
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.disp_gpio_num = GPIO_NUM_NC,
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.data_gpio_nums = {
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RGB_B0_GPIO, RGB_B1_GPIO, RGB_B2_GPIO, RGB_B3_GPIO, RGB_B4_GPIO,
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RGB_G0_GPIO, RGB_G1_GPIO, RGB_G2_GPIO, RGB_G3_GPIO, RGB_G4_GPIO, RGB_G5_GPIO,
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RGB_R0_GPIO, RGB_R1_GPIO, RGB_R2_GPIO, RGB_R3_GPIO, RGB_R4_GPIO,
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},
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.flags = {
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.fb_in_psram = true,
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},
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};
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ESP_RETURN_ON_ERROR(esp_lcd_new_rgb_panel(&panel_config, &panel), TAG,
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"esp_lcd_new_rgb_panel failed");
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ESP_LOGI(TAG, "Panel buffers allocated; free internal heap: %u KB",
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(unsigned)(heap_caps_get_free_size(MALLOC_CAP_INTERNAL) / 1024));
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return ESP_OK;
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}
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/*
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* Phase 2: start scan-out and hand the framebuffers to LVGL.
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*
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* From esp_lcd_panel_init() onward the bounce-refill ISR is reading PSRAM
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* continuously, so every flash write (NVS, WiFi PHY calibration) must already
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* be done -- see the init-order comment in main.c.
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*/
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esp_err_t display_start(void)
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{
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ESP_RETURN_ON_FALSE(panel != NULL, ESP_ERR_INVALID_STATE, TAG,
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"display_alloc() must run before display_start()");
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/* lv_display_create() below allocates from LVGL's heap. Without lv_init()
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* that heap is a null pool and the call faults with LoadProhibited. */
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ESP_RETURN_ON_FALSE(lv_is_initialized(), ESP_ERR_INVALID_STATE, TAG,
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"lv_init() must run before display_start()");
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ESP_RETURN_ON_ERROR(esp_lcd_panel_reset(panel), TAG, "panel reset failed");
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ESP_RETURN_ON_ERROR(esp_lcd_panel_init(panel), TAG, "panel init failed");
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void *fb0 = NULL;
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void *fb1 = NULL;
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ESP_RETURN_ON_ERROR(esp_lcd_rgb_panel_get_frame_buffer(panel, 2, &fb0, &fb1), TAG,
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"failed to get framebuffers");
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const size_t fb_size = DISPLAY_H_RES * DISPLAY_V_RES * sizeof(uint16_t);
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memset(fb0, 0, fb_size);
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memset(fb1, 0, fb_size);
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disp = lv_display_create(DISPLAY_H_RES, DISPLAY_V_RES);
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ESP_RETURN_ON_FALSE(disp != NULL, ESP_FAIL, TAG, "lv_display_create failed");
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lv_display_set_color_format(disp, LV_COLOR_FORMAT_RGB565);
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lv_display_set_flush_cb(disp, rgb_flush_cb);
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/*
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* DIRECT mode with the two framebuffers as LVGL's own buffers. LVGL draws
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* the dirty regions into the back buffer and keeps both in sync itself;
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* no separate internal draw buffer is needed, which also hands ~25KB of
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* internal RAM back for the bounce buffers.
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*/
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lv_display_set_buffers(disp, fb0, fb1, fb_size, LV_DISPLAY_RENDER_MODE_DIRECT);
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ESP_LOGI(TAG, "Panel up: %dx%d @ %d MHz, double-buffered fb0=%p fb1=%p (%u KB each)",
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DISPLAY_H_RES, DISPLAY_V_RES, RGB_PCLK_HZ / 1000000,
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fb0, fb1, (unsigned)(fb_size / 1024));
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ESP_LOGI(TAG, "Free internal heap: %u KB",
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(unsigned)(heap_caps_get_free_size(MALLOC_CAP_INTERNAL) / 1024));
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return ESP_OK;
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}
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lv_display_t *display_get_default(void)
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{
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return disp;
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}
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esp_lcd_panel_handle_t display_get_panel(void)
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{
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return panel;
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}
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