Implement rotary thermostat firmware from PRD
ESP-IDF v5.3.2 firmware for the CrowPanel 2.1" rotary display. Builds clean;
nothing has been run on hardware yet.
Hardware verified against Elecrow's own source for this board and
cross-checked against their ESPHome config, per PRD 8.1. Three corrections to
the PRD's pinout, all documented in docs/HARDWARE.md:
- touch is CST826 at 0x15, not CST816 (chip ID reads 0x11, not 0xB4)
- the ST7701S needs a 3-wire SPI bus on GPIO 16/2/1 that the PRD omitted;
without it the init sequence cannot be sent and the panel stays black
- the backlight is GPIO6
Two further departures from the PRD, both forced by facts on the ground:
- Transport is MQTT, not HTTP. zigbee2mqtt has no REST endpoint for live
sensor state. Subscribing to the broker also gets retained topics, so
every room's last reading arrives on connect rather than after a poll.
- The furnace is 2-wire R/W with no C, not 3-wire. The board needs its own
5V supply. The thermostat's 5 CPH setting is enforced as a minimum
12-minute period between heat-call starts, which a minimum off-time alone
does not achieve.
All of PRD section 5 is implemented in the relay layer itself: fail-open,
watchdog-gated output, max on-time, min off-time, cycle-rate limit, startup
lockout, and the stale-data fallback ladder down to open-loop freeze
protection. The one gap that cannot be closed in software — the PCF8574 not
resetting when the ESP32 does — is documented rather than papered over.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
This commit is contained in:
mattandClaude Opus 5 committed
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@@ -0,0 +1,326 @@
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#include "display.h"
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#include <string.h>
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#include "driver/ledc.h"
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#include "esp_check.h"
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#include "esp_lcd_panel_io.h"
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#include "esp_lcd_panel_io_additions.h"
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#include "esp_lcd_panel_rgb.h"
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#include "esp_log.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "pcf8574.h"
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#include "st7701_init.h"
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static const char *TAG = "display";
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/* ---- Pinout: docs/HARDWARE.md, verified against Elecrow's own example ---- */
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#define PIN_LCD_CS 16
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#define PIN_LCD_SCK 2
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#define PIN_LCD_SDA 1
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#define PIN_LCD_DE 40
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#define PIN_LCD_HSYNC 15
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#define PIN_LCD_VSYNC 7
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#define PIN_LCD_PCLK 41
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#define PIN_BACKLIGHT 6
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/*
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* SPI mode 0. Arduino_GFX's Arduino_SWSPI::begin() drives SCK low at init and
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* shifts on the rising edge. Elecrow's ESPHome config says MODE3, but that
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* file also documents its own colours as wrong.
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*
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* If the panel is black on first bring-up, this is the first thing to try
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* changing — before touching the init sequence, and long before rewriting
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* anything else.
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*/
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#define ST7701_SPI_MODE 0
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/*
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* Timings from the vendor's Arduino example. The ESPHome example uses
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* 20/10/10 and 8/10/10 instead; either set should work. Swap if the image
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* rolls or shears.
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*/
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#define LCD_PCLK_HZ (18 * 1000 * 1000)
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#define LCD_HSYNC_FRONT 10
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#define LCD_HSYNC_PULSE 4
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#define LCD_HSYNC_BACK 20
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#define LCD_VSYNC_FRONT 10
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#define LCD_VSYNC_PULSE 4
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#define LCD_VSYNC_BACK 20
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#define BACKLIGHT_LEDC_TIMER LEDC_TIMER_0
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#define BACKLIGHT_LEDC_CHANNEL LEDC_CHANNEL_0
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#define BACKLIGHT_LEDC_MODE LEDC_LOW_SPEED_MODE
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#define BACKLIGHT_RES LEDC_TIMER_10_BIT
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static esp_lcd_panel_handle_t s_panel;
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static void *s_fb0, *s_fb1;
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/* ------------------------------------------------------------ backlight -- */
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static esp_err_t backlight_init(void)
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{
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ledc_timer_config_t timer = {
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.speed_mode = BACKLIGHT_LEDC_MODE,
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.timer_num = BACKLIGHT_LEDC_TIMER,
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.duty_resolution = BACKLIGHT_RES,
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.freq_hz = 5000,
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.clk_cfg = LEDC_AUTO_CLK,
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};
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ESP_RETURN_ON_ERROR(ledc_timer_config(&timer), TAG, "ledc timer");
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ledc_channel_config_t ch = {
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.gpio_num = PIN_BACKLIGHT,
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.speed_mode = BACKLIGHT_LEDC_MODE,
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.channel = BACKLIGHT_LEDC_CHANNEL,
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.timer_sel = BACKLIGHT_LEDC_TIMER,
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.duty = 0,
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.hpoint = 0,
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};
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return ledc_channel_config(&ch);
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}
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void display_set_backlight(uint8_t percent)
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{
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if (percent > 100) {
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percent = 100;
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}
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uint32_t max = (1u << BACKLIGHT_RES) - 1;
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uint32_t duty = (max * percent) / 100;
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ledc_set_duty(BACKLIGHT_LEDC_MODE, BACKLIGHT_LEDC_CHANNEL, duty);
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ledc_update_duty(BACKLIGHT_LEDC_MODE, BACKLIGHT_LEDC_CHANNEL);
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}
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/* --------------------------------------------------------- reset dance --- */
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/*
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* Reproduces the vendor example's setup() ordering exactly, including the P3
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* ("LCD power") pulse. Despite the label, P3 goes high before the reset and
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* low again once the backlight is running, which only makes sense as blanking
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* to hide init garbage. Copied rather than reasoned about — see
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* docs/HARDWARE.md.
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*
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* P1 is deliberately untouched throughout: it is the relay.
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*/
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static esp_err_t panel_power_and_reset(void)
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{
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ESP_RETURN_ON_ERROR(pcf8574_write(PCF_PIN_LCD_POWER, true), TAG, "p3");
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vTaskDelay(pdMS_TO_TICKS(100));
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ESP_RETURN_ON_ERROR(pcf8574_write(PCF_PIN_LCD_RST, true), TAG, "p4 hi");
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vTaskDelay(pdMS_TO_TICKS(100));
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ESP_RETURN_ON_ERROR(pcf8574_write(PCF_PIN_LCD_RST, false), TAG, "p4 lo");
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vTaskDelay(pdMS_TO_TICKS(120));
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ESP_RETURN_ON_ERROR(pcf8574_write(PCF_PIN_LCD_RST, true), TAG, "p4 hi2");
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vTaskDelay(pdMS_TO_TICKS(120));
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return ESP_OK;
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}
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/* --------------------------------------------------------------- init ---- */
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static esp_err_t send_init_sequence(void)
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{
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esp_lcd_panel_io_handle_t io = NULL;
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esp_lcd_panel_io_3wire_spi_config_t io_cfg = {
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.line_config = {
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.cs_io_type = IO_TYPE_GPIO,
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.cs_gpio_num = PIN_LCD_CS,
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.scl_io_type = IO_TYPE_GPIO,
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.scl_gpio_num = PIN_LCD_SCK,
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.sda_io_type = IO_TYPE_GPIO,
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.sda_gpio_num = PIN_LCD_SDA,
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.io_expander = NULL,
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},
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.expect_clk_speed = PANEL_IO_3WIRE_SPI_CLK_MAX,
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.spi_mode = ST7701_SPI_MODE,
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.lcd_cmd_bytes = 1,
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.lcd_param_bytes = 1,
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.flags = {
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.use_dc_bit = 1, /* 9-bit frames: DC bit then 8 data bits */
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.dc_zero_on_data = 0, /* DC=0 command, DC=1 data (ST7701 order) */
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.lsb_first = 0,
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.cs_high_active = 0,
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/*
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* Keep CS inactive after we delete this IO. The RGB bus takes over
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* the panel from here and must not see CS wander.
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*/
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.del_keep_cs_inactive = 1,
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},
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};
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ESP_RETURN_ON_ERROR(esp_lcd_new_panel_io_3wire_spi(&io_cfg, &io),
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TAG, "3wire spi io");
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esp_err_t err = ESP_OK;
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for (size_t i = 0; i < ST7701_INIT_SEQ_LEN; i++) {
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const st7701_cmd_t *c = &st7701_init_seq[i];
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err = esp_lcd_panel_io_tx_param(io, c->cmd,
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c->data_len ? c->data : NULL,
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c->data_len);
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if (err != ESP_OK) {
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ESP_LOGE(TAG, "init cmd %u (0x%02X) failed: %s",
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(unsigned)i, c->cmd, esp_err_to_name(err));
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break;
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}
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if (c->delay_ms) {
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vTaskDelay(pdMS_TO_TICKS(c->delay_ms));
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}
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}
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/* The init bus is single-use; the RGB peripheral owns the panel now. */
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esp_lcd_panel_io_del(io);
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if (err == ESP_OK) {
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ESP_LOGI(TAG, "ST7701S init sequence sent (%u commands)",
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(unsigned)ST7701_INIT_SEQ_LEN);
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}
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return err;
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}
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static esp_err_t rgb_panel_init(void)
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{
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esp_lcd_rgb_panel_config_t cfg = {
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.clk_src = LCD_CLK_SRC_PLL160M,
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.timings = {
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.pclk_hz = LCD_PCLK_HZ,
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.h_res = DISPLAY_H_RES,
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.v_res = DISPLAY_V_RES,
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.hsync_pulse_width = LCD_HSYNC_PULSE,
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.hsync_back_porch = LCD_HSYNC_BACK,
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.hsync_front_porch = LCD_HSYNC_FRONT,
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.vsync_pulse_width = LCD_VSYNC_PULSE,
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.vsync_back_porch = LCD_VSYNC_BACK,
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.vsync_front_porch = LCD_VSYNC_FRONT,
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.flags = {
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/* Elecrow's ESPHome config sets pclk_inverted, i.e. data is
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* latched on the falling edge. */
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.pclk_active_neg = 1,
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},
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},
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.data_width = 16,
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.bits_per_pixel = 16,
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.num_fbs = 2,
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/*
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* No bounce buffers — this is what makes runtime NVS writes safe.
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* See the header comment. Do not "optimise" this to a non-zero value
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* without re-reading PRD 8.2.
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*/
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.bounce_buffer_size_px = 0,
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.psram_trans_align = 64,
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.hsync_gpio_num = PIN_LCD_HSYNC,
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.vsync_gpio_num = PIN_LCD_VSYNC,
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.de_gpio_num = PIN_LCD_DE,
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.pclk_gpio_num = PIN_LCD_PCLK,
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.disp_gpio_num = -1,
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/*
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* RGB565 bit order: data[0..4] = blue, [5..10] = green, [11..15] = red.
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* If red and blue come out swapped, swap these two blocks — the panel's
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* own MADCTL is already 0x00 (RGB) from the init sequence.
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*/
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.data_gpio_nums = {
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5, 45, 48, 47, 21, /* B0..B4 */
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14, 13, 12, 11, 10, 9, /* G0..G5 */
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46, 3, 8, 18, 17, /* R0..R4 */
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},
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.flags = {
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.fb_in_psram = 1,
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},
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};
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ESP_RETURN_ON_ERROR(esp_lcd_new_rgb_panel(&cfg, &s_panel), TAG, "rgb panel");
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ESP_RETURN_ON_ERROR(esp_lcd_panel_reset(s_panel), TAG, "panel reset");
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ESP_RETURN_ON_ERROR(esp_lcd_panel_init(s_panel), TAG, "panel init");
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ESP_RETURN_ON_ERROR(
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esp_lcd_rgb_panel_get_frame_buffer(s_panel, 2, &s_fb0, &s_fb1),
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TAG, "get framebuffers");
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ESP_LOGI(TAG, "RGB panel up: %dx%d @ %d MHz, fb0=%p fb1=%p",
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DISPLAY_H_RES, DISPLAY_V_RES, LCD_PCLK_HZ / 1000000, s_fb0, s_fb1);
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return ESP_OK;
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}
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esp_err_t display_init(void)
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{
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if (!pcf8574_is_ready()) {
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ESP_LOGE(TAG, "expander not ready — cannot sequence panel power");
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return ESP_ERR_INVALID_STATE;
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}
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ESP_RETURN_ON_ERROR(panel_power_and_reset(), TAG, "power/reset");
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ESP_RETURN_ON_ERROR(send_init_sequence(), TAG, "init sequence");
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ESP_RETURN_ON_ERROR(rgb_panel_init(), TAG, "rgb");
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ESP_RETURN_ON_ERROR(backlight_init(), TAG, "backlight");
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/* Clear both buffers before the backlight comes up, so the first thing on
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* screen is black rather than whatever was in PSRAM. */
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size_t fb_bytes = (size_t)DISPLAY_H_RES * DISPLAY_V_RES * 2;
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memset(s_fb0, 0, fb_bytes);
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memset(s_fb1, 0, fb_bytes);
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display_set_backlight(80);
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/* Vendor ordering: P3 low once the backlight is running. */
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pcf8574_write(PCF_PIN_LCD_POWER, false);
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return ESP_OK;
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}
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esp_lcd_panel_handle_t display_panel(void)
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{
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return s_panel;
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}
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esp_err_t display_get_framebuffers(void **fb0, void **fb1)
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{
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if (!s_panel) {
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return ESP_ERR_INVALID_STATE;
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}
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if (fb0) {
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*fb0 = s_fb0;
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}
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if (fb1) {
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*fb1 = s_fb1;
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}
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return ESP_OK;
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}
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void display_test_pattern(void)
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{
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static const uint16_t bars[] = {
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0xF800, /* red */
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0x07E0, /* green */
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0x001F, /* blue */
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0xFFFF, /* white */
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0xFFE0, /* yellow */
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0x07FF, /* cyan */
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0xF81F, /* magenta*/
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0x0000, /* black */
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};
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const int n = sizeof(bars) / sizeof(bars[0]);
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const int bar_w = DISPLAY_H_RES / n;
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uint16_t *fb = (uint16_t *)s_fb0;
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if (!fb) {
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ESP_LOGE(TAG, "no framebuffer");
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return;
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}
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for (int y = 0; y < DISPLAY_V_RES; y++) {
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for (int x = 0; x < DISPLAY_H_RES; x++) {
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int i = x / bar_w;
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fb[y * DISPLAY_H_RES + x] = bars[i < n ? i : n - 1];
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}
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}
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esp_lcd_panel_draw_bitmap(s_panel, 0, 0, DISPLAY_H_RES, DISPLAY_V_RES, fb);
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ESP_LOGI(TAG, "colour bars drawn — this is the PRD phase-2 check");
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}
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@@ -0,0 +1,55 @@
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/*
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* ST7701S + RGB panel, 480x480 round.
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*
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* Two things about the configuration here are deliberate and load-bearing:
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*
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* No bounce buffers. The bounce-buffer refill ISR reads PSRAM, which shares
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* the cache with flash on the S3, so any NVS write while the panel runs faults
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* with "Cache disabled but cached memory region accessed" (PRD 8.2). This
|
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* project writes settings to NVS at runtime, so instead of pausing the panel
|
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* around every write we simply do not use bounce buffers: the LCD DMA reads
|
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* the framebuffer out of PSRAM directly and never touches the cache.
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*
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* Two framebuffers. Writing into the framebuffer currently being scanned
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* races the LCD's reads, and the corruption persists because LVGL does not
|
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* know those pixels are wrong and never reinvalidates them (PRD 8.2). With
|
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* num_fbs=2 the panel driver swaps whole buffers instead.
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*
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* 480x480x2 bytes x 2 buffers is ~920KB of the 8MB PSRAM.
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*/
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#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include "esp_err.h"
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#include "esp_lcd_panel_ops.h"
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#define DISPLAY_H_RES 480
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#define DISPLAY_V_RES 480
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/*
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* Bring up the panel: expander power/reset sequencing, 3-wire SPI init,
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* RGB bus, backlight.
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*
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* Requires i2c_bus_init() and pcf8574_init() to have run. PRD 8.2 also wants
|
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* WiFi up before this point.
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||||
*/
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esp_err_t display_init(void);
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/* The esp_lcd panel handle, for the LVGL port. */
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esp_lcd_panel_handle_t display_panel(void);
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/* Both framebuffers, for LVGL to render into directly. */
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esp_err_t display_get_framebuffers(void **fb0, void **fb1);
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/* Backlight, 0-100. */
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void display_set_backlight(uint8_t percent);
|
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|
||||
/*
|
||||
* Fill the screen with vertical colour bars, bypassing LVGL.
|
||||
*
|
||||
* This is the PRD phase-2 check: it proves the init sequence, the RGB bus and
|
||||
* the timings independently of anything LVGL does.
|
||||
*/
|
||||
void display_test_pattern(void);
|
||||
@@ -0,0 +1,148 @@
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/*
|
||||
* ST7701S initialisation sequence for the CrowPanel 2.1" round panel.
|
||||
*
|
||||
* Transcribed verbatim from `st7701_type5_init_operations` in the
|
||||
* Arduino_GFX bundled with Elecrow's own example for this board
|
||||
* (example/libraries/GFX_Library_for_Arduino/src/display/Arduino_ST7701_RGBPanel.h),
|
||||
* which is what example/RotaryScreen_2_1/RotaryScreen_2_1.ino passes to the
|
||||
* panel constructor.
|
||||
*
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||||
* PRD 8.1: one wrong byte here gives garbage or nothing, with no useful
|
||||
* diagnostic. Do not "tidy" these values. Do not reorder them. The bank
|
||||
* selects (0xFF ...) change the meaning of every register that follows, so a
|
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* command moved across one is a different command.
|
||||
*
|
||||
* Cross-checked against example/esphome/esphome2.1.yaml, which carries the
|
||||
* same sequence minus three commands in bank 0x10 (0xC0, 0xC1, 0xC2) — and
|
||||
* which admits in its own comments that its colours come out wrong. The three
|
||||
* extra commands are kept.
|
||||
*
|
||||
* The leading software reset (0x01) is from the ESPHome version. It is not in
|
||||
* the Arduino one, but it costs 5ms and makes the starting state deterministic
|
||||
* rather than "whatever the previous firmware left behind".
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct {
|
||||
uint8_t cmd;
|
||||
uint8_t data[16];
|
||||
uint8_t data_len;
|
||||
uint16_t delay_ms;
|
||||
} st7701_cmd_t;
|
||||
|
||||
static const st7701_cmd_t st7701_init_seq[] = {
|
||||
/* Software reset. */
|
||||
{0x01, {0}, 0, 5},
|
||||
|
||||
/* ---- Bank 0x10 ---- */
|
||||
{0xFF, {0x77, 0x01, 0x00, 0x00, 0x10}, 5, 0},
|
||||
|
||||
{0xC0, {0x3B, 0x00}, 2, 0},
|
||||
{0xC1, {0x0B, 0x02}, 2, 0}, /* VBP */
|
||||
{0xC2, {0x00, 0x02}, 2, 0},
|
||||
|
||||
{0xCC, {0x10}, 1, 0},
|
||||
{0xCD, {0x08}, 1, 0},
|
||||
|
||||
/*
|
||||
* Not part of st7701_type5_init_operations, but Arduino_GFX's
|
||||
* begin() calls setRotation(0) straight afterwards, and that path sends
|
||||
* 0xC7 0x00 here (Y direction) before dropping back to bank 0x00 to write
|
||||
* MADCTL. The vendor example therefore does send it, so it belongs in the
|
||||
* sequence.
|
||||
*
|
||||
* That same setRotation(0) call is where the constructor's `bgr = true`
|
||||
* argument lands: with bgr set it writes MADCTL 0x00, which is what this
|
||||
* sequence already writes below. So bgr=true is a no-op at rotation 0 and
|
||||
* the RGB panel does not need its BGR flag set.
|
||||
*/
|
||||
{0xC7, {0x00}, 1, 0},
|
||||
|
||||
/* Positive voltage gamma control. */
|
||||
{0xB0, {0x02, 0x13, 0x1B, 0x0D,
|
||||
0x10, 0x05, 0x08, 0x07,
|
||||
0x07, 0x24, 0x04, 0x11,
|
||||
0x0E, 0x2C, 0x33, 0x1D}, 16, 0},
|
||||
|
||||
/* Negative voltage gamma control. */
|
||||
{0xB1, {0x05, 0x13, 0x1B, 0x0D,
|
||||
0x11, 0x05, 0x08, 0x07,
|
||||
0x07, 0x24, 0x04, 0x11,
|
||||
0x0E, 0x2C, 0x33, 0x1D}, 16, 0},
|
||||
|
||||
/* ---- Bank 0x11 ---- */
|
||||
{0xFF, {0x77, 0x01, 0x00, 0x00, 0x11}, 5, 0},
|
||||
|
||||
{0xB0, {0x5D}, 1, 0},
|
||||
{0xB1, {0x43}, 1, 0}, /* VCOM amplitude */
|
||||
{0xB2, {0x81}, 1, 0}, /* VGH, 12V */
|
||||
{0xB3, {0x80}, 1, 0},
|
||||
|
||||
{0xB5, {0x43}, 1, 0}, /* VGL, -8.3V */
|
||||
|
||||
{0xB7, {0x85}, 1, 0},
|
||||
{0xB8, {0x20}, 1, 0},
|
||||
|
||||
{0xC1, {0x78}, 1, 0},
|
||||
{0xC2, {0x78}, 1, 0},
|
||||
|
||||
{0xD0, {0x88}, 1, 0},
|
||||
|
||||
{0xE0, {0x00, 0x00, 0x02}, 3, 0},
|
||||
|
||||
{0xE1, {0x03, 0xA0, 0x00, 0x00,
|
||||
0x04, 0xA0, 0x00, 0x00,
|
||||
0x00, 0x20, 0x20}, 11, 0},
|
||||
|
||||
{0xE2, {0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
0x00}, 13, 0},
|
||||
|
||||
{0xE3, {0x00, 0x00, 0x11, 0x00}, 4, 0},
|
||||
|
||||
{0xE4, {0x22, 0x00}, 2, 0},
|
||||
|
||||
{0xE5, {0x05, 0xEC, 0xA0, 0xA0,
|
||||
0x07, 0xEE, 0xA0, 0xA0,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00}, 16, 0},
|
||||
|
||||
{0xE6, {0x00, 0x00, 0x11, 0x00}, 4, 0},
|
||||
|
||||
{0xE7, {0x22, 0x00}, 2, 0},
|
||||
|
||||
{0xE8, {0x06, 0xED, 0xA0, 0xA0,
|
||||
0x08, 0xEF, 0xA0, 0xA0,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00}, 16, 0},
|
||||
|
||||
{0xEB, {0x00, 0x00, 0x40, 0x40,
|
||||
0x00, 0x00, 0x00}, 7, 0},
|
||||
|
||||
{0xED, {0xFF, 0xFF, 0xFF, 0xBA,
|
||||
0x0A, 0xBF, 0x45, 0xFF,
|
||||
0xFF, 0x54, 0xFB, 0xA0,
|
||||
0xAB, 0xFF, 0xFF, 0xFF}, 16, 0},
|
||||
|
||||
{0xEF, {0x10, 0x0D, 0x04, 0x08,
|
||||
0x3F, 0x1F}, 6, 0},
|
||||
|
||||
/* ---- Bank 0x13 ---- */
|
||||
{0xFF, {0x77, 0x01, 0x00, 0x00, 0x13}, 5, 0},
|
||||
{0xEF, {0x08}, 1, 0},
|
||||
|
||||
/* ---- Back to the command bank ---- */
|
||||
{0xFF, {0x77, 0x01, 0x00, 0x00, 0x00}, 5, 0},
|
||||
|
||||
{0x36, {0x00}, 1, 0}, /* MADCTL */
|
||||
{0x3A, {0x60}, 1, 0}, /* 0x70=RGB888, 0x60=RGB666, 0x50=RGB565 */
|
||||
|
||||
{0x11, {0}, 0, 120}, /* sleep out */
|
||||
{0x29, {0}, 0, 50}, /* display on */
|
||||
};
|
||||
|
||||
#define ST7701_INIT_SEQ_LEN \
|
||||
(sizeof(st7701_init_seq) / sizeof(st7701_init_seq[0]))
|
||||
Reference in new issue
Block a user